Various integrated circuits utilize structures formed with nitride for various purposes. For example, a spacer formed of nitride may be provided on the sidewalls of a gate during the front-end of the line (FEOL) processing. The nitride spacers are typically formed on the gate sidewalls after a source/drain extension implant has been performed. Following the formation of the nitride spacers, a second dopant implantation is performed to form the source/drains. The nitride spacers prevent the additional dopants in the source/drain implant from being implanted into the source/drain extension area underneath the nitride spacers. This maintains a lightly doped extension region, while allowing the remaining portions of the source/drain region to be doped appropriately.
It is preferable when forming nitride spacers to provide a low deposition rate in order to provide better process control. In a known plasma-enhanced chemical vapor deposition (PECVD) process, used to provide a nitride layer, silane (SiH.sub.4) is provided to the deposition chamber at a flow rate of between 151 to 183 sccm. Nitrogen (N.sub.2) is provided at a flow rate of 3000 sccm. Ammonia (NH.sub.3) is provided at a flow rate of between 120 to 140 sccm. Pressure is maintained in the deposition chamber at 4.9 torr, with a temperature of 400.degree. C. RF power is applied in the chamber at 625 watts and the spacing is 540 mils.
The results of the nitride deposition process above deposits nitride at a deposition rate of 100 .ANG./sec. The nitride layer has a refractive index comprising RI=1.915, with step coverage=70%. Non-uniformity of the thickness within a wafer is 1.5%. The non-uniformity in the thickness from wafer-to-wafer is 0.5%. Improvements in the quality of the nitride layer is desirable.